The present invention relates to a differential amplifier circuit, and in particular, to a high slew rate differential amplifier circuit for use in a driver for a liquid crystal display device.
A conventional rail-to-rail differential amplifier circuit is configured as shown in FIG. 3.
A main section of the circuit comprises a P-type MOS differential input section 1 composed of transistors M1, M2, and M3, N-type MOS differential input section 2 composed of transistors M4, M5, and M6, a current mirror circuit 3 composed of transistors M7, M8, M9, and M10, a current mirror circuit 4 composed of transistors M11, M12, M13, and M14, and a push pull output tier 5 composed of transistors M15 and M16, wherein reference Vdd denotes a positive power voltage and reference Vss denotes a negative power voltage.
A non-inverted input (+) is connected to gates of the transistors M3 and M5, while an inverted input (xe2x88x92) is connected to gates of the transistors M2 and M4. An output of the P-type MOS differential input section 1 from the transistors M2 and M3 is input to the current mirror circuit 4, while an output of the N-type MOS differential input section 2 from the transistors M4 and M5 is input to the current mirror circuit 3. The current mirror circuits 3 and 4 are connected together via resistors R1 and R2, a gate of a transistor M15 of the push pull output tier 5 is connected to a connection between the transistor M10 and one end of the resistor R2, while a gate of a transistor M16 of the push pull output tier 5 is connected to a connection between the transistor M12 and the other end of the resistor R2. Alternatively, the resistors R1 and R2 can be configured using MOS transistors.
References C1 and C2 denote phase compensating capacities, and references Vb1 to Vb4 denote bias voltages set to allow the corresponding transistors to operate appropriately. An external load CL is connected between the output of the push pull output tier 5 and the negative power voltage Vss.
A current flowing through the transistor M1 acting as a constant current source for the P-type MOS differential input section 1 is defined as Im1, whereas a current flowing through the transistor M6 acting as a constant current source for the N-type MOS differential input section 2 is defined as Im6. When a non-inverted input voltage (Vin+) and an inverted input voltage (Vinxe2x88x92) are equal, that is, in a steady state, currents flowing through the transistors M2 and M3 of the P-type MOS differential input section 1 are each (Im1)xc2x7(1/2), whereas currents flowing through the transistors M4 and M5 of the N-type MOS differential input section 2 are each (Im6)xc2x7(1/2).
When the steady state changes to a state where the non-inverted input (Vin+) is higher than the inverted input voltage (Vinxe2x88x92), most of the constant current (Im1) on the P-type MOS input side flows through the transistor M2 to increase a current flowing through the transistor M13. Thus, the current mirror circuit 4 increases currents flowing through the transistors M12 and M14 to reduce a gate voltage of the output transistor M16 to diminish a current flowing through the output transistor M16 as well as a lead-in current to an external load CL. A gate voltage of the output transistor M15 also decreases to increase a current flowing through the M15 to charge the external load CL. At this point, most of the constant current (Im6) on the N-type MOS input side flows through the transistor M5 to reduce a current flowing through the transistor M10 to lessen a gate voltage of the output transistor M15. Accordingly, the current flowing through the M15 increases to charge the external load CL to raise an output voltage Vout.
When the steady state changes to a state where the non-inverted input (Vin+) is lower than the inverted input voltage (Vinxe2x88x92), most of the constant current (Im1) on the P-type MOS input side flows through the transistor M3 to reduce the current flowing through the transistor M12. Thus, the gate voltage of the output transistor M16 rises to increase the current flowing through the output transistor M16 as well as the lead-in current to the external load CL.
At this point, most of the constant current (Im6) on the N-type MOS input side flows through the transistor M4 to increase a current flowing through the transistor M7. Thus, the current mirror circuit 3 increases currents flowing through the transistors M8 and M10 to raise a gate voltage of the output transistor M15 to diminish the current flowing through the output transistor M15 as well as a speed at which the external load CL is charged. Accordingly, the gate voltage of the output transistor M16 rises to increase the current flowing through the M16 as well as the lead-in current to the external load CL to lower the output voltage Vout.
Recent liquid crystal display devices for use in TVs or personal computer displays comprise larger screens with a higher resolution. Source drives are correspondingly required to have the capability of driving a larger load at a higher speed.
FIG. 6 schematically shows a liquid crystal display device.
A liquid crystal panel 10 comprises an active matrix liquid panel having a pixel 13 located at an intersection between each scanning line 11 and a corresponding data line 12 and a drive device for driving the liquid crystal panel. The drive device 14 comprises source drivers 16 controlled by a controller 15 and gate drivers 17.
The source driver 16 receives a signal from the controller 15 to drive the pixel 13, and the gate driver 17 switches a gate of a TFT (a thin film transistor) 18.
For example, an XGA (1,024xc3x97768) liquid crystal panel requires 1024xc3x973 (R, G, B)=3,072 outputs, so that if the source driver has 384 outputs, 3,072/384=8 source driver chips are used.
One source driver chip with the 384 outputs has 384 differential amplifier circuits mounted thereon.
To accommodate a high-resolution liquid crystal panel with a UXGA (1,600xc3x971,200) or a QXGA (2,048xc3x971,536), a source driver with 480 or 516 outputs is required and in this case, one source driver 16 chip has 480 or 516 differential amplifier circuits mounted thereon.
Due to the larger screen and higher resolution of the liquid crystal panel 10, the source driver 16 is required to have the capability of driving a larger load at a higher speed while maintaining power consumption at a low level. Thus, the differential amplifier circuit mounted on the source driver 16 must be able to maintain current consumption at a low level and have a higher slew rate.
Furthermore, since the source driver 16 has a large number of differential amplifier circuits mounted thereon as described above, the slew rate must be improved by adding simple circuits having as small circuit area as possible so as not increase the chip area.
Since the source driver requires a large dynamic range, it often employs rail-to-rail amplifiers such as conventional differential amplifier circuits. The slew rate of such differential amplifier circuits for driving an external load is in proportion to a current value of a differential input section and is in inverse proportion to a capacity value of a phase compensating capacity. To improve the slew rate without adding slew rate improving circuits so as not to increase the circuit area, the currents Im1 and Im6 through the constant current source transistors M1 and M6 of the differential input section may be increased or phase compensating capacities C1 and C2 may be diminished.
A problem is, however, that an increase in the current through the differential input section increases the steady-state current and thus current consumption, while reduction of the phase compensating capacity degrades stability.
It is an object of the present invention to provide a high slew rate differential amplifier circuit that can maintain stability without increasing current consumption while eliminating the need to increase the circuit area.
A high slew rate differential amplifier circuit as set forth in a first arrangement of the present invention uses an output from a differential input section to drive an output tier via a current mirror circuit, and is characterized in that a current source circuit comprising a constant current source transistor and a transistor connected in series therewith and having a gate voltage of an output transistor of the output tier input to a gate thereof is connected in parallel with a constant current source transistor of the differential input section as a sub-current source. To increase a current through the differential input section when a high slew rate is required, the current source circuit comprising the transistor having the gate voltage of the output transistor input to the gate thereof and the constant current source transistor connected in series with the first transistor is used as a sub-current source for the differential circuit, in order to reduce the steady-state current.
A high slew rate differential amplifier circuit as set forth in a second arrangement of the invention comprises a P-type differential input section and an N-type differential input section each having the same non-inverted input terminal and inverted input terminal connected to an input thereof, an N-type current mirror circuit driven by an output from the P-type differential input section, a P-type current mirror circuit driven by an output from the N-type differential input section, and a push pull output tier driven having a P-type output transistor driven by an output from the P-type current mirror circuit and an N-type output transistor driven by an output from the N-type current mirror circuit, and is characterized in that the configuration of the present arrangement is implemented both in the P- and N-type differential input sections.
A high slew rate differential amplifier circuit as set forth in a third arrangement of the invention is characterized by comprising a P-type differential input section and an N-type differential input section each having the same non-inverted input terminal and inverted input terminal connected to an input thereof, an N-type current mirror circuit driven by an output from the Ptype differential input section, a P-type current mirror circuit driven by an output from the N-type differential input section, an output tier driven by an output from the N-type current mirror circuit and an output from the P-type current mirror circuit, and a sub-current source comprising a current source circuit including a constant current source transistor and a transistor connected in series therewith and having a gate voltage of the output tier input to a gate thereof, the current source circuit being connected to a constant current source transistor of the P- or N-type differential input section, in such a manner that an output from the current source circuit is inverted via current mirror circuits. To increase the current through the differential input section when a high slew rate is required, the current source circuit including the transistor having the gate voltage of the output transistor input to the gate thereof and the constant current source transistor is used as a sub-current source for the differential circuit in such a manner that the polarity of the current source circuit is inverted by the current mirror circuits, thereby reducing the steady-state current.
A high slew rate differential amplifier circuit as set forth in a fourth arrangement of the invention is characterized in that the configuration of the third arrangement is implemented both in the P- and N-type differential input sections.
A high slew rate differential amplifier circuit as set forth in a fifth arrangement of the invention is characterized by being configured by omitting the constant current source transistor from the sub-current source of the configuration of the first arrangement.
A high slew rate differential amplifier circuit as set forth in a sixth arrangement of the invention is characterized in that the configuration of the fifth arrangement is implemented both in the P- and N-type differential input sections.
A high slew rate differential amplifier circuit as set forth in a seventh arrangement of the invention is characterized by being configured by omitting the constant current source transistor from the sub-current source of the configuration of the third arrangement.
A high slew rate differential amplifier circuit as set forth in an eighth arrangement of the invention is characterized in that the configuration of the seventh arrangement is implemented both in the P- and N-type differential input sections.
A liquid crystal display device as set forth in a ninth arrangement of the invention is characterized by comprising an active matrix liquid panel having a pixel located at an intersection between each scanning line and a corresponding data line and a drive device for driving the liquid crystal panel, the drive device being configured by connecting an output from the output tier of the high slew rate differential amplifier circuit according to any one of arrangements one through eight to the data line.